1. Field of the Invention
The present invention relates to a direct conversion transceiver, and more particularly, to a direct conversion transceiver that is capable of reducing a DC offset using a multi-chip module.
2. Description of the Related Art
Wireless mobile phones have been developed to reduce their sizes, power consumption and manufacturing costs. Nonetheless, these factors are still important factors that must be improved to manufacture good-quality wireless mobile phones.
To improve the above factors, it is effective to apply direct conversion architecture to a radio-frequency (RF) part, thereby removing an image rejection filter and also, reducing the number of elements required.
However, the use of the direct conversion architecture causes a DC offset that is confused with an actual signal and saturates an amplifier installed next to a mixer.
Accordingly, various methods or apparatuses for reducing the DC offset have been developed. FIGS. 1 and 2 are circuit diagrams of general direct conversion receivers for reducing the DC offset.
Referring to FIG. 1, a signal received by an antenna 10 is amplified by a first amplifier 12 and then is combined with a reference signal output from a local oscillator 34 by the first and second mixers 14 and 16. During this process, carrier signals are excluded from signals output from the first and second mixers 14 and 16. These signals pass through first and second low-pass filters (LPFs) 18 and 20, respectively, and as a result, high-frequency components contained in these signals are canceled. Signals output from the first and second LPFs are amplified by second and third amplifiers 26 and 30, respectively. Here, reference numeral 36 denotes a phase shifter that shifts the phase of the reference signal output from the local oscillator 34 by 90°.
Thereafter, as shown in FIG. 3, when a reference signal cos WLOt is injected to the first mixer 14 from a local oscillator (not shown), an oscillator signal leakage 50 may be caused during substrate coupling and bond wire coupling. Further, as shown in FIG. 4, large interfere leakage 52 is also generated when an interference signal, which is received via the antenna 10, is amplified by the first amplifier 12 by the substrate coupling and bond wire coupling. The oscillator signal leakage 50 and the large interfere leakage 52 are self-mixed to generate the DC offset.
For reduction of the DC offset, the conventional direct conversion receiver of FIG. 1 includes a first capacitor 22 between the first LPF 18 and the second amplifier 26, and a second capacitor 24 between the second LPF 20 and the third amplifier 30. The first and second capacitors 22 and 24 are massive and additionally require grounding circuits 28 or 32 to be charged or discharged, respectively, thereby increasing the size of the circuit. Also, the first and second capacitors 22 and 24 are useful only for frequency shift keying modulation.
FIG. 2 shows a method for removing a DC offset through which the DC offset received to first and second analog-to-digital (A/D) converters 40 and 42 is operated by a data processing circuit 44 and a DC offset operated by a negative feedback loop including first and second digital-to-analog (D/A) converters 46 and 48 is subtracted. The first D/A converter 46 is positioned between a first mixer 14 and the data processing circuit 44, and converts a predetermined digital signal, which is output from the data processing circuit 44, into an analog signal and feeds the analog signal back to the first mixer 14. The second D/A converter 48 is positioned between a second mixer 16 and the data processing circuit 44, and converts a predetermined digital signal into an analog signal and feeds the analog signal back to the second mixer 16. (For details of the circuit of FIG. 2, see Japanese Patent Publication Laid-Open No. Hei 3-220823 entitled “Direct Convergence Receiver”)
However, the circuit of FIG. 2 is disadvantageous in that it uses a closed loop, and thus loop convergence time is limited. For this reason, this circuit is not available to wireless mobile phones having short time slots.